Due to the continuing increased density of processing power per size of processing chips, the International Technology Roadmap for Semiconductors (ITRS) predicts that temperature issues associated with chips will continue to increase. Indeed, the ITRS predicts that the allowable maximum power dissipated for high-performance and cost-effective microprocessor units (MPU) is going to increase steadily while chip size will remain constant. The ITRS also predicts a steady decrease in DRAM half-pitch and MPU gate length, along with higher performance of the microprocessors with a steady increase in on-chip and off-chip frequencies. The increase in maximum power density and a decrease in feature size, as predicted by ITRS, results in increased background heat flux (or heat generation) for processing chips and extremely high heat fluxes at hot spot locations where specific concentrations of heat are generated on processing chips.
Excessive heat generation can have undesirable side effects for computer processing chips. Such side effects include inefficient operation which in turn possibly wastes operating power, and processing chip overheating possibly leading to device failure. Another possible problem is unwanted heat generation which can, at times, be uncomfortable or even potentially harmful to an end user.
To address these thermal issues, there are several widely used conventional techniques. Perhaps the most prevalent technique is the use of a radiating heat sink. A heat sink is a heat conducting device (typically made of metal) situated proximate to or in contact with a processing chip that usually has a larger surface area than a chip. The heat sink essentially absorbs heat generated from processing chip and radiates the heat to the surrounding environment as a method of removing heat from the processing chip. Another conventional technique involves the use of a fan. The fan is used to circulate air around a processing chip as a method of removing heat. In certain applications, a fan may be used together with a radiating heat sink.
While serving their respective purposes, these conventional techniques of solving heat problems do posses several drawbacks. One such drawback is the inability to focus in on specific areas of heat generation (or hot spots) occurring on a chip. Similarly, another drawback is that the size of conventional techniques does not enable thermal management at lower scale locations (e.g., micro-scale or nano-scale) using easily controlled techniques. And yet another drawback is the limited magnitude of a heat flux (per unit area) that can be removed using conventional cooling techniques, and thermal problems associated with high performance electronic chips.
Accordingly, there is a need for micro-scale and nano-scale thermal management devices, methods, and systems having improved properties. In addition, there is a need for improved methods of managing thermal loads in hot spot areas (e.g., spatially localized hot spots) of chips and to provide a solution capable of dissipating high fluxes from these hot spot areas without excessive rise in chip junction temperatures. It is to the provision of such micro-scale and nano-scale thermal management devices, methods, and systems that the various embodiments of the present invention are directed.